Depletion-type MOSFET

A slab of p-type material is formed from a silicon base and is referred to as the substrate. The source and drain terminals are connected through metallic contacts to n-doped regions linked by an n-channel. The gate is also connected to a metal contact surface but remains insulated from the n-channel by a very thin silicon dioxide (\(SiO_2\)) layer. \(SiO_2\) is a type of insulator referred to as a dielectric.

There is no direct electrical connection between the gate terminal and the channel of a MOSFET.

It is the insulating layer of \(SiO_2\) in the MOSFET construction that accounts for the very desirable high input impedance of the device.

The input resistance of a MOSFET is usually more than that of a typical JFET. Because of the very high input impedance, the gate current \(I_G\) is essentially \(0\ A\) for DC-biased configurations.

Basic Operation and Characteristics

The gate-to-source voltage \(V_{GS}\) is set to \(0\ V\) and a voltage \(V_{DD}\) is applied across the drain-to-source terminals. The result is an attraction of the free electrons of the n-channel for the positive voltage at the drain.

The negative potential at the gate will tend to pressure electrons toward the p-type substrate. Depending on the magnitude of the negative bias established by \(V_{GS}\), a level of recombination between electrons and holes will occur that will reduce the number of free electrons in the n-channel available for conduction. The resulting level of drain current \(I_D\) is therefore reduced with increasing negative bias for \(V_{GS}\).

For positive values of \(V_{GS}\), the positive gate will draw additional electrons from the p-type substrate due to the reverse leakage current and establish new carriers through the collisions resulting between accelerating particles. As the gate-to-source voltage \(V_{GS}\) continues to increase in the positive direction, the drain current \(I_D\) will increase at a rapid rate. Due to the rapid rise, the user must be aware of the maximum drain current rating since it could be exceeded with a positive gate voltage.

For the region of positive gate voltages is often referred to as the enhancement region, with the region between cutoff and the saturation level of \(I_{DSS}\) referred to as the depletion region.

Shockley’s equation will continue to be applicable for the depletion-type MOSFET characteristics in both the depletion and enhancement regions.

P-channel Depletion-type MOSFET

The construction of a p-channel depletion-type MOSFET is exactly the reverse of the n-channel depletion-type MOSFET. The terminals remain as identified, but all the voltage polarities and the current directions are reversed.

The drain characteristics would appear exactly as in n-channel depletion-type MOSFET, but with \(V_{DS}\) having negative values and \(V_{GS}\) having the opposite polarities.

Symbols

n-channel Depletion-type MOSFET
p-channel Depletion-type MOSFET

Biasing

See FET biasing for the general analysis of all FET amplifiers.

DC Analysis

The similarities in appearance between the transfer curves of JFETs and depletion-type MOSFETs permit a similar analysis of each in the DC domain. The primary difference between the two is the fact that depletion-type MOSFETs permit operating points with positive values of \(V_{GS}\) and levels of \(I_D\) that exceed \(I_{DSS}\).

AC Analysis

The fact that Shockley’s equation is also applicable to depletion-type MOSFETs (D-MOSFETs) results in the same equation for \(g_m\). The AC equivalent model for D-MOSFETs is exactly the same as that employed for JFETs.

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Metal-Semiconductor Field-Effect Transistor (MESFET)

The drain and transfer characteristics of depletion-type MESFET are so similar to those of the depletion-type MOSFET results in analysis techniques similar to those applied to depletion-type MOSFETs.

The use of a Schottky barrier at the gate is the major difference from the depletion-type and enhancement-type MOSFETs, which employ an insulating barrier between the metal contact and the n-type channel. The absence of an insulating layer reduces the distance between the metal contact surface of the gate and the semiconductor layer, resulting in a lower level of stray capacitance between the two surfaces. The result of the lower capacitance level is a reduced sensitivity to high frequencies (forming a shorting effect), which further supports the high mobility of carriers in the \(GaAs\) material.
Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)

Depletion-type MOSFET
Enhancement-type MOSFET

Although there are some similarities in construction and mode of operation between depletion-type and enhancement-type MOSFETs, the characteristics of the enhancement-type MOSFET are quite different. The transfer curve is not defined by Shockley’s equation, and the drain current is now cut off until the gate-to-source voltage reaches a specific magnitude.

As \(V_{GS}\) is increased beyond the threshold level, the density of free carriers in the induced channel will increase, resulting in an increased level of drain current. However, if we hold \(V_{GS}\) constant and increase the level of \(V_{DS}\), the drain current \(I_D\) will eventually reach a saturation level as occurred for the JFET and depletion-type MOSFET. The leveling off of \(I_D\) is due to a pinching-off process depicted by the narrower channel at the drain end of the induced channel.

If \(V_{GS} = 0\ V\) and voltage applied between the drain and the source of the n-channel enhancement-type MOSFET, the absence of an n-channel will result in a current of effectively \(0\ A\), which is quite different from the depletion-type MOSFET and JFET, where \(I_D = I_{DSS}\).

In every other aspect, the AC analysis is the same as that employed for JFETs or D-MOSFETs.

The construction of an enhancement-type MOSFET is quite similar to that of the depletion-type MOSFET, except for the absence of a channel between the drain and source terminals.